; generated by Component: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]
; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o.\flash\obj\misc.o --asm_dir=.\Flash\List\ --list_dir=.\Flash\List\ --depend=.\flash\obj\misc.d --cpu=Cortex-M3 --apcs=interwork -O0 --diag_suppress=9931,870 -I..\..\Libraries\CMSIS\Device\ST\STM32F10x\Include -I..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I..\..\Libraries\STM32_USB-FS-Device_Driver\inc -I..\..\Libraries\CMSIS\Include -I..\..\User\bsp -I..\..\User\bsp\inc -I..\..\User\app\inc -I..\..\User -IC:\Users\w1619\AppData\Local\Arm\Packs\Keil\STM32F1xx_DFP\2.4.1\Device\Include -D__MICROLIB -D__UVISION_VERSION=538 -DSTM32F10X_HD -DUSE_STDPERIPH_DRIVER -DSTM32F10X_HD --omf_browse=.\flash\obj\misc.crf ..\..\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c]
                          THUMB

                          AREA ||i.NVIC_Init||, CODE, READONLY, ALIGN=2

                  NVIC_Init PROC
;;;117      */
;;;118    void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
000000  b570              PUSH     {r4-r6,lr}
;;;119    {
;;;120      uint32_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F;
000002  2100              MOVS     r1,#0
000004  2300              MOVS     r3,#0
000006  220f              MOVS     r2,#0xf
;;;121      
;;;122      /* Check the parameters */
;;;123      assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
;;;124      assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority));  
;;;125      assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority));
;;;126        
;;;127      if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
000008  78c4              LDRB     r4,[r0,#3]
00000a  b304              CBZ      r4,|L1.78|
;;;128      {
;;;129        /* Compute the Corresponding IRQ Priority --------------------------------*/    
;;;130        tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08;
00000c  4c15              LDR      r4,|L1.100|
00000e  6824              LDR      r4,[r4,#0]
000010  f40464e0          AND      r4,r4,#0x700
000014  f5c464e0          RSB      r4,r4,#0x700
000018  0a21              LSRS     r1,r4,#8
;;;131        tmppre = (0x4 - tmppriority);
00001a  f1c10304          RSB      r3,r1,#4
;;;132        tmpsub = tmpsub >> tmppriority;
00001e  40ca              LSRS     r2,r2,r1
;;;133    
;;;134        tmppriority = (uint32_t)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre;
000020  7844              LDRB     r4,[r0,#1]
000022  fa04f103          LSL      r1,r4,r3
;;;135        tmppriority |=  NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub;
000026  7884              LDRB     r4,[r0,#2]
000028  4014              ANDS     r4,r4,r2
00002a  4321              ORRS     r1,r1,r4
;;;136        tmppriority = tmppriority << 0x04;
00002c  0109              LSLS     r1,r1,#4
;;;137            
;;;138        NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority;
00002e  4c0e              LDR      r4,|L1.104|
000030  7806              LDRB     r6,[r0,#0]
000032  55a1              STRB     r1,[r4,r6]
;;;139        
;;;140        /* Enable the Selected IRQ Channels --------------------------------------*/
;;;141        NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
000034  7804              LDRB     r4,[r0,#0]
000036  f004051f          AND      r5,r4,#0x1f
00003a  2401              MOVS     r4,#1
00003c  40ac              LSLS     r4,r4,r5
00003e  7805              LDRB     r5,[r0,#0]
000040  116d              ASRS     r5,r5,#5
000042  00ad              LSLS     r5,r5,#2
000044  f10525e0          ADD      r5,r5,#0xe000e000
000048  f8c54100          STR      r4,[r5,#0x100]
00004c  e009              B        |L1.98|
                  |L1.78|
;;;142          (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
;;;143      }
;;;144      else
;;;145      {
;;;146        /* Disable the Selected IRQ Channels -------------------------------------*/
;;;147        NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
00004e  7804              LDRB     r4,[r0,#0]
000050  f004051f          AND      r5,r4,#0x1f
000054  2401              MOVS     r4,#1
000056  40ac              LSLS     r4,r4,r5
000058  4d04              LDR      r5,|L1.108|
00005a  7806              LDRB     r6,[r0,#0]
00005c  1176              ASRS     r6,r6,#5
00005e  f8454026          STR      r4,[r5,r6,LSL #2]
                  |L1.98|
;;;148          (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
;;;149      }
;;;150    }
000062  bd70              POP      {r4-r6,pc}
;;;151    
                          ENDP

                  |L1.100|
                          DCD      0xe000ed0c
                  |L1.104|
                          DCD      0xe000e400
                  |L1.108|
                          DCD      0xe000e180

                          AREA ||i.NVIC_PriorityGroupConfig||, CODE, READONLY, ALIGN=2

                  NVIC_PriorityGroupConfig PROC
;;;101      */
;;;102    void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
000000  4902              LDR      r1,|L2.12|
;;;103    {
;;;104      /* Check the parameters */
;;;105      assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup));
;;;106      
;;;107      /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
;;;108      SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup;
000002  4301              ORRS     r1,r1,r0
000004  4a02              LDR      r2,|L2.16|
000006  6011              STR      r1,[r2,#0]
;;;109    }
000008  4770              BX       lr
;;;110    
                          ENDP

00000a  0000              DCW      0x0000
                  |L2.12|
                          DCD      0x05fa0000
                  |L2.16|
                          DCD      0xe000ed0c

                          AREA ||i.NVIC_SetVectorTable||, CODE, READONLY, ALIGN=2

                  NVIC_SetVectorTable PROC
;;;161      */
;;;162    void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset)
000000  4a02              LDR      r2,|L3.12|
;;;163    { 
;;;164      /* Check the parameters */
;;;165      assert_param(IS_NVIC_VECTTAB(NVIC_VectTab));
;;;166      assert_param(IS_NVIC_OFFSET(Offset));  
;;;167       
;;;168      SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
000002  400a              ANDS     r2,r2,r1
000004  4302              ORRS     r2,r2,r0
000006  4b02              LDR      r3,|L3.16|
000008  601a              STR      r2,[r3,#0]
;;;169    }
00000a  4770              BX       lr
;;;170    
                          ENDP

                  |L3.12|
                          DCD      0x1fffff80
                  |L3.16|
                          DCD      0xe000ed08

                          AREA ||i.NVIC_SystemLPConfig||, CODE, READONLY, ALIGN=2

                  NVIC_SystemLPConfig PROC
;;;180      */
;;;181    void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
000000  b129              CBZ      r1,|L4.14|
;;;182    {
;;;183      /* Check the parameters */
;;;184      assert_param(IS_NVIC_LP(LowPowerMode));
;;;185      assert_param(IS_FUNCTIONAL_STATE(NewState));  
;;;186      
;;;187      if (NewState != DISABLE)
;;;188      {
;;;189        SCB->SCR |= LowPowerMode;
000002  4a06              LDR      r2,|L4.28|
000004  6812              LDR      r2,[r2,#0]
000006  4302              ORRS     r2,r2,r0
000008  4b04              LDR      r3,|L4.28|
00000a  601a              STR      r2,[r3,#0]
00000c  e004              B        |L4.24|
                  |L4.14|
;;;190      }
;;;191      else
;;;192      {
;;;193        SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
00000e  4a03              LDR      r2,|L4.28|
000010  6812              LDR      r2,[r2,#0]
000012  4382              BICS     r2,r2,r0
000014  4b01              LDR      r3,|L4.28|
000016  601a              STR      r2,[r3,#0]
                  |L4.24|
;;;194      }
;;;195    }
000018  4770              BX       lr
;;;196    
                          ENDP

00001a  0000              DCW      0x0000
                  |L4.28|
                          DCD      0xe000ed10

                          AREA ||i.SysTick_CLKSourceConfig||, CODE, READONLY, ALIGN=1

                  SysTick_CLKSourceConfig PROC
;;;204      */
;;;205    void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
000000  2804              CMP      r0,#4
;;;206    {
;;;207      /* Check the parameters */
;;;208      assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
;;;209      if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
000002  d108              BNE      |L5.22|
;;;210      {
;;;211        SysTick->CTRL |= SysTick_CLKSource_HCLK;
000004  f04f21e0          MOV      r1,#0xe000e000
000008  6909              LDR      r1,[r1,#0x10]
00000a  f0410104          ORR      r1,r1,#4
00000e  f04f22e0          MOV      r2,#0xe000e000
000012  6111              STR      r1,[r2,#0x10]
000014  e007              B        |L5.38|
                  |L5.22|
;;;212      }
;;;213      else
;;;214      {
;;;215        SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8;
000016  f04f21e0          MOV      r1,#0xe000e000
00001a  6909              LDR      r1,[r1,#0x10]
00001c  f0210104          BIC      r1,r1,#4
000020  f04f22e0          MOV      r2,#0xe000e000
000024  6111              STR      r1,[r2,#0x10]
                  |L5.38|
;;;216      }
;;;217    }
000026  4770              BX       lr
;;;218    
                          ENDP


;*** Start embedded assembler ***

#line 1 "..\\..\\Libraries\\STM32F10x_StdPeriph_Driver\\src\\misc.c"
	AREA ||.rev16_text||, CODE
	THUMB
	EXPORT |__asm___6_misc_c_d0fc1254____REV16|
#line 114 "..\\..\\Libraries\\CMSIS\\Include\\core_cmInstr.h"
|__asm___6_misc_c_d0fc1254____REV16| PROC
#line 115

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE
	THUMB
	EXPORT |__asm___6_misc_c_d0fc1254____REVSH|
#line 128
|__asm___6_misc_c_d0fc1254____REVSH| PROC
#line 129

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
